@@ -31,9 +31,23 @@ namespace xsimd
3131 using x86_reg32_t = std::uint32_t ;
3232
3333 using cpuid_reg_t = std::array<x86_reg32_t , 4 >;
34- inline cpuid_reg_t get_cpuid (int level, int count = 0 ) noexcept ;
3534
36- inline x86_reg32_t get_xcr0_low () noexcept ;
35+ /* *
36+ * CPU Identification (CPUID) instruction results.
37+ *
38+ * The CPUID instruction provides detailed information about the processor,
39+ * including supported instruction set extensions (SSE, AVX, AVX-512, etc.).
40+ * This function is well defined on all architectures but will return all zeros
41+ * on all non-x86 architectures.
42+ *
43+ * @param leaf The value inputted to the EAX register.
44+ * @param subleaf The value inputted to the ECX register.
45+ *
46+ * @see https://en.wikipedia.org/wiki/CPUID
47+ */
48+ inline cpuid_reg_t x86_cpuid (int leaf, int subleaf = 0 ) noexcept ;
49+
50+ inline x86_reg32_t x86_xcr0_low () noexcept ;
3751 }
3852
3953 /* *
@@ -45,23 +59,23 @@ namespace xsimd
4559 *
4660 * @see https://en.wikipedia.org/wiki/CPUID
4761 */
48- class x86_cpu_id
62+ class x86_cpuid
4963 {
5064 public:
5165 /* * Read the CpuId registers from the CPU if on the correct architecture. */
52- inline static x86_cpu_id read ()
66+ inline static x86_cpuid read ()
5367 {
5468 cpu_id_regs regs = {};
5569 // TODO(C++20): Use designated initializer
56- regs.reg1 = detail::get_cpuid (0x1 );
57- regs.reg7 = detail::get_cpuid (0x7 );
58- regs.reg7a = detail::get_cpuid (0x7 , 0x1 );
59- regs.reg8 = detail::get_cpuid (0x80000001 );
60- return x86_cpu_id (regs);
70+ regs.reg1 = detail::x86_cpuid (0x1 );
71+ regs.reg7 = detail::x86_cpuid (0x7 );
72+ regs.reg7a = detail::x86_cpuid (0x7 , 0x1 );
73+ regs.reg8 = detail::x86_cpuid (0x80000001 );
74+ return x86_cpuid (regs);
6175 }
6276
6377 /* * Create a value which return false to everything. */
64- constexpr x86_cpu_id () noexcept = default;
78+ constexpr x86_cpuid () noexcept = default;
6579
6680 constexpr bool sse2 () const noexcept { return utils::all_bits_set<26 >(m_regs.reg1 [3 ]); }
6781
@@ -127,7 +141,7 @@ namespace xsimd
127141 };
128142
129143 /* * Parse CpuInfo register values into individual components. */
130- constexpr explicit x86_cpu_id (const cpu_id_regs& regs) noexcept
144+ constexpr explicit x86_cpuid (const cpu_id_regs& regs) noexcept
131145 : m_regs(regs)
132146 {
133147 }
@@ -170,8 +184,8 @@ namespace xsimd
170184 */
171185 inline static x86_xcr0 read ()
172186 {
173- assert (x86_cpu_id ::read ().osxsave ());
174- return x86_xcr0 (detail::get_xcr0_low ());
187+ assert (x86_cpuid ::read ().osxsave ());
188+ return x86_xcr0 (detail::x86_xcr0_low ());
175189 }
176190
177191 /* * Create a value which return false to everything. */
@@ -240,7 +254,7 @@ namespace xsimd
240254 {
241255#if XSIMD_TARGET_X86
242256
243- inline cpuid_reg_t get_cpuid (int leaf, int subleaf) noexcept
257+ inline cpuid_reg_t x86_cpuid (int leaf, int subleaf) noexcept
244258 {
245259 cpuid_reg_t reg = {};
246260#if defined(_MSC_VER)
@@ -272,7 +286,7 @@ namespace xsimd
272286 return reg;
273287 }
274288
275- inline xcr0_reg_t get_xcr0_low () noexcept
289+ inline x86_reg32_t x86_xcr0_low () noexcept
276290 {
277291#if defined(_MSC_VER)
278292#if _MSC_VER >= 1400
@@ -300,12 +314,12 @@ namespace xsimd
300314
301315#else // XSIMD_TARGET_X86
302316
303- inline cpuid_reg_t get_cpuid (int /* leaf */ , int /* subleaf */ ) noexcept
317+ inline cpuid_reg_t x86_cpuid (int /* leaf */ , int /* subleaf */ ) noexcept
304318 {
305319 return {}; // All bits to zero
306320 }
307321
308- inline x86_reg32_t get_xcr0_low () noexcept
322+ inline x86_reg32_t x86_xcr0_low () noexcept
309323 {
310324 return {}; // All bits to zero
311325 }
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