[OMNIML-4927] specdec_bench cell t0_d3 — Qwen/Qwen3.5-4B / MTP / vllm#1614
[OMNIML-4927] specdec_bench cell t0_d3 — Qwen/Qwen3.5-4B / MTP / vllm#1614ChenhanYu wants to merge 1 commit into
Conversation
Signed-off-by: chenhany <chenhany@nvidia.com>
|
Important Review skippedDraft detected. Please check the settings in the CodeRabbit UI or the ⚙️ Run configurationConfiguration used: Path: .coderabbit.yaml Review profile: CHILL Plan: Enterprise Run ID: You can disable this status message by setting the Use the checkbox below for a quick retry:
✨ Finishing Touches🧪 Generate unit tests (beta)
Comment |
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## main #1614 +/- ##
==========================================
- Coverage 76.88% 75.70% -1.18%
==========================================
Files 478 481 +3
Lines 52209 55406 +3197
==========================================
+ Hits 40140 41945 +1805
- Misses 12069 13461 +1392
Flags with carried forward coverage won't be shown. Click here to find out more. ☔ View full report in Codecov by Sentry. 🚀 New features to boost your workflow:
|
Summary\n- Add specdec_bench MTP vllm cell t0_d3 for Qwen/Qwen3.5-4B\n\n## Testing\n- Not run (cell YAML only)