PeakRDL-ify Hyperbus#34
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micprog
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May 22, 2026
| desc = "Initial latency cycles before read or write data."; | ||
| field { sw = rw; hw = r; reset = 4'h6; } value[3:0]; | ||
| } t_latency_access @ 0x00; | ||
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I personally prefer the style where we declare named registers and finally have a list of instantiations, but this works too.
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